Reliable optical communication systems use mechanisms for minimizing the effects of signal degradation occurring between associated transmitters and receivers. Signal degradation occurs due to a variety of factors and is exacerbated by the long-haul transmission distances and high optical channel counts required in many applications. Due to signal degradation, some transmitted data may be incorrectly interpreted at a receiver. If data is misinterpreted at a rate above that which is acceptable, the efficacy and viability of the system may be lost.
Forward Error Correction (FEC) is one technique used to help compensate for signal degradation and provide “margin improvements” to the system. Margin improvements generally allow an increase in amplifier spacing and/or increase in system capacity. In a Wavelength Division Multiplexing (WDM) system, for example, margin improvements obtained through FEC techniques may allow an increase in the bit rate of each WDM channel and/or a decrease in the spacing between WDM channels.
FEC generally involves insertion of a suitable error correction code into a transmitted data stream to facilitate detection and correction of data errors about which there is no previously known information. Error correction codes are generated in a FEC encoder for the data stream and are sent to a receiver including a FEC decoder. The FEC decoder recovers the error correction codes and uses them to correct any errors in the received data stream.
Of course, the efficacy of FEC techniques is impacted by the ability of the optical signal receiver to correctly detect transmitted data and error correction codes. Improvements in receiver signal detection thus translate to improved performance of FEC codes in providing correction of bit errors. One receiver configuration includes a decision circuit for converting the received data signal into a binary electrical signal, e.g. including logic ones and zeros representative of the transmitted data. The decision circuit may, for example, include a comparator for comparing the received data signal with a predetermined voltage level (the decision threshold). If the voltage level of the received data signal is above the decision threshold at a particular sample time, the comparator may output a logic one. If, however, the voltage level of the received data signal is below the decision threshold, the comparator may output a logic zero.
The decision circuit thus makes an initial decision (i.e., a hard decision) as to the data bit values of the received data stream. A “hard” decision or detector as used herein refers to a decision wherein a signal representative of a received data signal is compared to a single threshold to produce a single bit or symbol output for each of the data bit or symbol values of the received data stream. The FEC decoder detects and corrects errors in the data stream established by the hard decision circuit. Therefore, the setting of the decision threshold in the decision circuit is important in achieving optimal system bit error rate (BER).
One way to enhance FEC decoding capabilities is to use soft decision receivers or detectors in combination with soft decision FEC decoders. According to a soft decision schemes, the soft decision detector includes multiple decision circuits with different decision thresholds (e.g., different threshold voltage levels). The multiple decision circuits produce multiple bit “soft” “reliability” information, as compared to the single bit (i.e., a one or a zero) that is provided for hard decision detection. An n-bit soft decision scheme may use 2n-1 decision thresholds. Three decision thresholds may, for example, be used in a 2-bit soft decision scheme, and seven decision thresholds may be used in a 3-bit soft decision scheme. The multiple bit soft reliability information represents a confidence level in the received data and provides the FEC decoder with additional information, for example, whether the bit was very likely one, likely one, likely zero, or most likely zero. The extra information allows the use of more efficient soft decision FEC decoders, which allow operation in more noisy or more distorted channel conditions. Thus, as used herein a “soft” decision or detector refers to a decision wherein a signal representative of a received data signal is converted into multiple bit soft reliability information for each data bit or symbol value of the received data stream, the reliability information indicating a confidence level in the value (e.g. a digital “1” or “0”) of each data bit or symbol.
The choice of data modulation format in optical communication systems also effects signal degradation and system capacity. One data modulation scheme that may be used in optical communication systems is phase shift keying (PSK) in which data is transmitted by modulating the phase of an optical wavelength such that the phase or phase transitions of the optical wavelength represents symbols encoding one or more bits. In a binary phase-shift keying (BPSK) modulation scheme, for example, two phases may be used to represent 1 bit per symbol. In a quadrature phase-shift keying (QPSK) modulation scheme, four phases may be used to encode 2 bits per symbol.
PSK formats where data is encoded in phase transitions of the optical wavelength are known as differential formats. Differentially encoded PSK formats are described herein as “differential” (D), such as differential phase shift keying (DPSK), return-to-zero DPSK (RZ-DPSK), differential quadrature phase-shift keying (DQPSK), etc., if the encoding is reversed in demodulation e.g. in a hard or soft decision detector, or as “differential-coding” (DC), such as differential-coding phase-shift keying (DC-PSK), differential-coding quadrature phase-shift keying (DC-QPSK), etc, or if the encoding is reversed after demodulation in post-decision decoding.
In phase modulated optical communication systems, the receiver may be a coherent receiver using coherent detection, e.g. homodyne or heterodyne detection, to detect modulated optical signals. The term “coherent” when used herein in relation to a receiver refers to a receiver including a local oscillator (LO) for demodulating the received signal. Digital signal processing (DSP) may be implemented in such systems for processing the received signals to provide demodulated data. Digital signal processing of the received signal provides speed and flexibility, and may be used to perform a variety of functions including correction of nonlinearities associated with the optical transmission path such as chromatic dispersion, polarization mode dispersion, etc.
Coherent detection schemes for PSK systems include absolute-phase detection without differential decoding, absolute-phase detection with differential decoding, and differential phase detection. Absolute phase detection may involve making a decision, e.g. a soft decision, regarding the value of each bit in the received data stream based on an estimated phase. In one approach to differential decoding, a hard decision may be made on the current and previous received symbol (sn and sn-1) to provide corresponding hard decision outputs (hn and hn-1) and the differential phase may be found by taking the difference between the hard decisions (Δθ=∠hn−∠hn-1). In one approach to differential phase detection, the differential phase may be found by taking the difference between received symbols (Δθsoft=∠sn−∠sn-1) and then making a hard or soft decision on ΔθsoftΔθ.
Each one of these coherent detection schemes has its benefits and drawbacks. For instance, absolute-phase detection without differential decoding may provide acceptable receiver sensitivity and its soft-decision outputs may be directly used as decision reliability information in a succeeding soft-decision forward error correction (FEC). Without differential decoding, however, the scheme may not be tolerant to “cycle slip” (losing track of the phase of the received signal in the receiver), which may result in carrier phase off-tracking. Differential decoding can be used to make an absolute phase detection system cycle-slip tolerant, but can degrade the receiver sensitivity of the system. Another drawback for differential decoding is that the receiver may output only hard-decision values and thus, may not effectively support a succeeding soft-decision FEC.
Another way to resolve the cycle-slip issue in absolute phase detection is to use a differential phase detection scheme, in which no carrier phase tracking is required since detection is based on a comparison of phases between two bits. Although, the differential phase detection scheme can output soft decisions and support a succeeding soft-decision FEC, its receiver sensitivity may be worse than the other coherent detection schemes. Compared to the differential decoding with hard-decision FEC scheme, differential phase detection with soft-decision FEC can provide some extra coding gain from the soft-decision FEC. Most if not all of the extra coding, however, could be lost by the receiver sensitivity loss in differential phase detection.